1. Field of the Invention
The present invention relates to a pattern inspection system which is used to inspect defects of a pattern drawn on a mask, a semiconductor integrated circuit pattern in particular, and has a pattern feature extraction function for extracting the feature of a circuit pattern.
2. Description of the Related Art
Heretofore, such a type of pattern inspection system chiefly adopts a way of pattern inspection which makes a comparison between image data obtained by taking the image of an inspected pattern with an image sensor and reference pattern data made from design patter data and detects points at which data comparison indicates no equality as defects. This type of inspection, which is more reliable than a die to die comparison method which makes a comparison between adjacent two inspected patterns, has a drawback (misalignment) that errors in line width and the roundness of corners of an inspected circuit pattern which result from resist processes and misregistration between a table adapted for mechanical scanning of the inspected circuit pattern and a reference circuit pattern can also be detected as defects.
This type of inspection is generally required to detect defects of the size of 1/5 to 1/3 of the minimum line width of a semiconductor integrated circuit. As the packing density of a semiconductor integrated circuit increases, the minimum line width of a circuit pattern becomes increasingly small. The size of 1/5 to 1/3 of the minimum line width is close to the optical resolution. It is therefore difficult to obtain a high-contrast image (image data).
To solve the above problems, an approach is disclosed in Japanese Unexamined Patent Publication No. 62-266406, which obtains a gradient vector of each of an inspected pattern and a reference pattern and makes a comparison between the absolute value of 3.times.3 surface shape of the both portion. However, this approach cannot separate signals used for defect inspection into a signal resulting from misregistration and a signal resulting from a defect. Thus, there is the possibility of false defect detection due to misregistration.
The conventional type of defect inspection is more reliable than a type which makes no reference to a design pattern but has a drawback that dimensional errors due to rounded corners of a circuit pattern and thinning or fattening of line widths and a positioning error of an examination table can also be detected as defects.
To solve the drawback, a method may be devised which extracts the pattern features of a circuit pattern, such as its edges and corners, and changes a defect detecting algorithm in accordance with extracted features (for example, processing parameters are changed). As an example of the method, there is a template matching method, according to which a very large amount of calculations must be performed when picture elements of an integrated circuit increase in number. It is difficult to perform the calculations at a high speed. It is very difficult to match templates, which are provided for all edges and corners of a circuit pattern in four directions, for example, 0.degree., 45.degree., 90.degree. and 135.degree. directions, against the circuit pattern for each picture element in real time (within the time it takes to inspect the circuit pattern).
As described above, the conventional system adapted to optically inspect defects of a semiconductor circuit pattern has a problem that a dimensional error due to photoresist process for producing a circuit pattern and a positioning error due to misregistration between an inspected pattern (a sensor pattern) and a reference pattern can be detected as defects.